MX3
Edge AI Accelerator Chip
The AI engine behind the Cascade 100 family—available for custom, chip-down designs.MX3 is MemryX’s production-proven AI accelerator, built to deliver efficient, real-time inference directly within your hardware. Integrate a single MX3 or scale across multiple chips to match your application’s performance requirements—all while keeping power consumption, thermals, and host-system demands under control.
At a glance
AI performance
Scalable
Up to 100 TFLOPS
Weight storage
Power
Best for
Physical AI & Edge AI
Add AI without building your system around it.
MX3 works alongside the host processor, taking on neural-network inference while leaving host compute available for the rest of the application. Its compact footprint and low power profile make it practical to add real-time AI to products where size, power, thermals, and system resources all matter.
PRODUCT PROOF
Purpose-built AI acceleration.
The key hardware characteristics of MX3 Edge AI Accelerator at a glance.
6.25
TFLOPS
AI compute performance per chip
10.5
MB
On-chip weight memory per chip
Up to 16
Flexible multi-chip scaling
As a single logical unit
What you get
Dedicated AI inference that works alongside your host.
Chip-down design flexibility
Integrate MX3 directly into custom hardware and optimize the form factor for your system’s size, power, performance, and thermal requirements.
Dedicated AI offload
Offload neural-network inference to MX3 while preserving host compute for the rest of your application. Unified software experience
Unified software experience
Use the same MemryX software workflow—from model compilation through runtime deployment—across single- and multi-chip configurations.
Real-time batch-1 inference
MX3’s pipelined dataflow architecture delivers low-latency inference without relying on large batch sizes.
Inside the architecture
Why MX3 works differently
At-memory compute and a pipelined dataflow architecture deliver efficient, consistent AI inference without requiring developers to redesign their applications around the accelerator.
Accuracy
Preserve accuracy without retraining
BFloat16 activations help preserve model accuracy through direct compilation—without retraining, quantization-aware training, or manual model optimization.
PREDICTABILITY
Consistent batch-1 latency
MX3 keeps multiple inputs in flight through its pipelined dataflow architecture, maintaining high hardware utilization without relying on large batches. The result is consistent, low-latency inference for asynchronous workloads.
Integration
Designed to work with your host
MX3 operates as a dedicated AI accelerator, offloading neural-network inference while preserving host compute for the rest of the application.
Architecture
At-memory dataflow
MX3 keeps model data close to compute, minimizing costly data movement to deliver efficient, high-throughput AI inference.
Flexibility
Build beyond a single model
Run models independently or combine them through concurrent, pipelined, and conditional execution—so developers can design around the application, not the accelerator.
Deployment
Built to scale
Scale from a single MX3 to multi-chip configurations using a common software foundation as model and performance requirements grow.
Specifications
MX3 Edge AI Accelerator in detail.
Product
Package
AI performance
On-chip weight memory
Host interfaces
PCIe Gen 3 and above; USB 3.2 Gen 1
Power
Inference
Activation precision
Weight precision
Frameworks
Junction temperature
−40°C to 125°C
Deployment
Availability
Applications
Built for real-world AI
Video Management Systems
Industrial & Robotics
Transportation
Smart Devices
Start building
Everything you need to get started.
Documentation
Get started guide
Install the SDK, run your first inference, and compile your own model.
CODE
eXamples
Working reference applications you can clone and run on MemryX hardware.
Support
Community forum
Ask questions, share builds and get help from MemryX engineers.
Design MX3 into your next AI system.
Talk to the MemryX team about chip-down designs, system requirements, and purchasing.
